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Fast and scalable architectures that can compute real-time convolutions with relatively large kernels.
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Description: Fast and scalable architectures that can compute real-time convolutions with relatively large kernels. Abstract: This technology is an advancement of fast architectures that can reduce the latency of the convolution components of the system to be significantly below the number of elements in the image. Furthermore, this system exceeds the standard use of systolic array implementations that process one pixel per cycle.